Semiconductor technologies are continually progressing to smaller feature sizes, for example down to feature sizes of 32 nanometers, and below in advanced technologies. A patterned photoresist (resist) layer is typically used to produce such small feature sizes. Maintaining a desired critical dimension (CD) can be very difficult for various reasons. A double patterning lithography process has been introduced to form various features with split patterns. Although this has been satisfactory for its intended purpose, it has not been satisfactory in all respects. For example, current double patterning lithography process utilizes multiple masks which involve high manufacturing costs and low throughput.